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Interests: speculative superscalar out-of-order cpu microarch, ISA design, memory system, ... VLSI/ASIC, sync and async (dynamic) logic
9 new projects with 16 stars.
Coding for 15 years.
127 followers.
Contribution Graph
Activity Timeline
Commits and contributions grouped by day, week, or month.
labeled issue in tommythorn/simmerv
February 9th, 2026 5:59 PM
opened issue in tommythorn/simmerv
February 9th, 2026 5:59 PM
IssueCommentEvent on tommythorn/simmerv
February 9th, 2026 5:52 PM
Pushed to main at tommythorn/simmerv
February 9th, 2026 5:50 PM
closed issue in tommythorn/simmerv
February 9th, 2026 5:50 PM
closed issue in tommythorn/simmerv
February 8th, 2026 11:05 PM
Pushed to main at tommythorn/simmerv
February 8th, 2026 11:05 PM
Pushed to main at tommythorn/simmerv
February 8th, 2026 10:46 PM
labeled issue in tommythorn/simmerv
February 8th, 2026 10:43 PM
labeled issue in tommythorn/simmerv
February 8th, 2026 10:43 PM